1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to a fluid ejection device and a method of fabricating the same.
2. Description of the Related Art
Strong basic solutions, such as TMAH, KOH, or NaOH, are commonly used as etching solutions in silicon fabrication processes. Such solutions offer different etching performance for various monosilicon crystal planes. Although etching performance for various crystal planes may have slight distinctions due to different kinds or concentration of etching solution, or different etching temperatures, the etching rates for various crystal planes is approximately (111)<(110)<(100), specifically, the etching rate for crystal plane (111) is far slower than for others.
FIG. 1 and FIG. 2 illustrate the etching performance of a strong basic solution for various crystal planes. Referring to FIG. 1, the crystal plane (100) is etched to form an anisotropic etching track with an included angle of 54.7° in substrate 10. In FIG. 2, which shows the etching result of the crystal plane (111), a vertically anisotropic etching track is formed in substrate 10.
Therefore, a manifold with a back opening larger than a front opening is formed in the chip (100) while etching the back thereof is performed, for example, a back opening width of a manifold with a front opening width of about 200 μm is enlarged to about 1100˜1200 μm during etching the back of the chip. Thus, the manifold formed in chip (100) occupies the majority of a wafer, and substantially reduces the available area thereon.
Additionally, during assemble, a chip must provide sufficient space for binding with a cartridge. Generally, the width of the binding region at the left and right sides of a chip is about 1200 μm respectively. Thus, a chip should provide a bottom region width of at least 3500˜3600 μm for fabricating a fluid ejection device, thereby reducing availability in the bottom area thereon.
Currently, the original substrate (100) is replaced by a substrate (111) to reduce the back opening size of a manifold. Nevertheless, although the back opening width thereof can be reduced due to specific etching performance, the manifold shape may slant to result in an unexpected chamber shape, deteriorating the dispersion effect of the device.
Referring to FIG. 3, a conventional fluid ejection device comprises a silicon substrate 10, a manifold 20 used to transport fluid, chambers 30 formed in both sides of the manifold 20 to store fluid, and a plurality of nozzles 40 installed on the device surface to ejection fluid.
According to the above device structure, the back opening is larger than the front opening of the manifold, thus the back opening occupies the majority of the wafer, and substantially reduces the available area thereon.
Additionally, a conventional fabrication method for a fluid ejection device is disclosed in the following description, and illustrated in FIGS. 4a to 4b. Referring to FIG. 4a, a substrate 10, such as a silicon substrate with crystal orientation (100) is provided. A patterned sacrificial layer 20 is formed on the substrate 10. The sacrificial layer 20 is composed of BPSG, PSG, or silicon oxide, preferably PSG. Subsequently, a patterned structural layer 30 is formed on the substrate 10 to cover the patterned sacrificial layer 20. The structural layer 30 includes silicon oxide nitride formed by chemical vapor deposition (CVD).
Next, a patterned resist layer 40 is formed on the structural layer 30 as an actuator, such as a heater. The resist layer 40 comprises HfB2, TaAl, TaN, or TiN. A patterned isolation layer 50 is then formed to cover the substrate 10 and the structural layer 30, and a heater contact 45 is formed thereon. Subsequently, a patterned conductive layer 60 is formed on the structural layer 30 to fill the heater contact 45 to form a signal transmission line 62. Finally, a protective layer 70 is formed on the isolation layer 50 and the conductive layer 60, exposing the conductive layer 60 to form a signal transmission line contact 75, thereby facilitating the subsequent packaging process.
Subsequently, referring to FIG. 4b, the back of the substrate 10 is etched by wet etching using KOH as an etching solution to form a manifold 80, and exposes the sacrificial layer 20. The sacrificial layer 20 is then etched by HF to form a chamber 90. Finally, the protective layer 70, the isolation layer 50, and the structural layer 30 are then etched in order to form a nozzle 95 connecting the chamber 90.
The back opening is larger than the front opening of the manifold 80 due to the specific crystal orientation (100) of the substrate 10, and thereby occupies excessive bottom area on the wafer.